• Digital Engineer

    TAD PGS, Inc.Rolling Meadows, IL 60008

    Job #1781532315

  • We have an outstanding Contract position for aDigital Engineerto join a leading engineering Company located in theRolling Meadows, ILsurrounding area.

    Must be a US Citizen.

    Must possess an active Top Secret security clearance.

    Please click on this link if you have any questions on how to obtain a clearance : ~~~

    Basic Hiring Criteria :

    • Bachelors' degree in Electrical Engineering, Computer Engineering or similar engineering discipline with a minimum of 5 years of FPGA/ASIC design experience

    • Experience with RTL coding for FPGAs or ASICs

    • Proficient in FPGA design flow including items such as RTL/gate-level simulation, synthesis, place and route, static timing analysis, and power analysis

    • Experience with FPGA simulation tools to verify the performance of complex RTL blocks

    • Knowledge of DSP structures and techniques

    • Experience with Xilinx or Intel/Altera FPGA architectures and design tools Familiarity with revision control, documentation, planning, and review systems similar to GIT/SVN/ClearCase, DOORS, Jira/Rally/ClearQuest

    • Proven skills to include: Adaptive, creative, collaborative, comfortable working independently, enjoys solving difficult problems while communicating with all levels of an organization internally and externally

    Desired Qualifications :

    • Active or Current Top Secret Security Clearance with SCI.

    • Master's Electrical Engineering, Computer Engineering, or similar engineering discipline with a minimum of 3 years of FPGA/ASIC design experience

    • Advanced knowledge of VHDL/Verilog, C, Python, or other scripting languages

    • Proficiency in High-level synthesis (Xilinx Vivado HLS AND/OR Mentor Catapult HLS) with C+

      • Experience developing in MATLAB/Simulink
    • Implementation of Digital Signal or Image Processing algorithms on FPGAs

    • Experience with Electronic Design Automation (EDA) Tools: Mentor Graphics ModelSim/QuestaSim, Synplify, Xilinx ISE/ Vivado, Intel Quartus, Altera SOPC Builder, Altera Qsys, DSP Builder.

    • Expertise in achieving timing closure on FPGA designs and generating test benches

    • Experience working with or developing test benches using SystemVerilog and Universal Verification Methodology (UVM)

    • Experience debugging down to the hardware level & experience using Signal Generators, Logic Analyzers, Digital Oscilloscopes, and Embedded FPGA Debugging tools

    TAD PGS, ~~~ a Global Fortune 500 company with worldwide revenue of over $27 billion and more than 50 decades of government contracting experience. We specialize in supporting U.S. Government Agencies and their prime vendors by delivering a full range of recruitment and workforce solutions. As part of the Adecco family, we have access to over 2.5 million active candidates supporting hundreds of locations across North America. On any given day, we have more than 70,000 professionals working at client sites across the United States.

    VEVRAA Federal Contractor / Request Priority Protected Veteran Referrals / Equal Opportunity Employer / Veterans / Disabled

    The Company will consider qualified applicants with arrest and conviction records.

    To read our Candidate Privacy Information Statement, which explains how we will use your information, please visit~~~/

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